Hitachi CL32W30TAN Wartungshandbuch Seite 34

Test Point ID Net Name
TP884 EX-AD2
TP885 EX-AD1
TP886 EX-AD0
A007 IF-AGC
A020 18MHz-Clock-out
A062 CLK18M
A036 EXT-OSC
A048 EXT-OSC
A025 EXT-OSC
A056 EXT-OSC
A045 EXT-OSC
TP800 EXT-OSC
A023 EXT-OSC
A017 EXT-OSC
A010 5v-OSC
A016 AMP_VCXO
A057 AMP_VCXO
A038 AMP_VCXO
A058 AMP_VCXO
TP806 AMP_VCXO
TP807 AMP_VCXO
TP888 AMP_VCXO
A039 AMP_VCXO
A079 VCXOCTAL
A172 VCXOCTAL
A061 0R0_IF_EXT_ADC
A217 3v3-COFDM
A067 GND-ADC
A092 SCL-780
A091 SDA-780
A049 AVIN
A068 AD-VREF
A071 AD-REF
TP850 PROCQ
A087 AGC-OUT
A046 EX-AD0
A053 EX-AD1
A065 EX-AD2
A059 EX-AD3
A041 EX-AD4
A054 EX-AD5
A060 EX-AD6
A042 EX-AD7
A043 EX-AD8
A044 EX-AD9
A081 3v3-COFDM
A097 EXT-IN-0
A093 EXT-IN-1
A098 EXT-IN-2
A164 RESET
A167 TCK
A173 TMS
A175 TDI
A140 CLK54M
A177 TDO
A111 CLK54M
TP808 /DTACK
TP809 /INT
TP811 I2C-CONTROL
TP812 IC780-1
TP813 IC780-2
A155 SD1_1
A156 SD1_2
A157 SD1_3
A139 SD1_3
A138 SD1_2
Function
External ADC data bit 2/ tuner ADC data bit 0 link through
External ADC data bit 1
External ADC data bit 0
tuner IF AGC line
18MHz clock buffered/unbuffered
Shaped 18MHz clock buffered/unbuffered
Colpitts oscillator VCXO voltage
Colpitts oscillator XTAL output
VCXO XTAL
VCXO XTAL
Output Colpitts oscillator
AC coupled DC biased Colpitts oscillator output
External oscillator 5V supply
non-inverted VCXO amplifier output
inverted VCXO amplifier output
VCXO amplifier input signal
VCXO amplifier input signal
Filtered VCXO signal from COFDM demod IC801
Unfiltered VCXO signal from COFDM demod IC801
3V3 COFDM supply voltage
COFDM demod I2C clock
COFDM demod I2C data
External ADC data bit 0
External ADC data bit 1
External ADC data bit 2/ tuner ADC data bit 0 link through
External ADC data bit 3/ tuner ADC data bit 1 link through
External ADC data bit 4/ tuner ADC data bit 2 link through
External ADC data bit 5/ tuner ADC data bit 3 link through
External ADC data bit 6/ tuner ADC data bit 4 link through
External ADC data bit 7/ tuner ADC data bit 5 link through
External ADC data bit 8/ tuner ADC data bit 6 link through
External ADC data bit 9/ tuner ADC data bit 7 link through
3V3 COFDM filtered supply
Input port, not used, 0V
Input port, not used, 0V
Input port, not used, 0V
JTAG reset
JTAG clock
JTAG test mode select
JTAG test data in
54 MHz clock out
JTAG data test out
?????
Dta acknowledge output
Interrupt output
Tunet I2C gate enable
Unused port pin
Unused port pin
Second 4 bit output data bit 1
Second 4 bit output data bit 2
Second 4 bit output data bit 3
Second 4 bit output data bit 3 link through to FEC
Second 4 bit output data bit 2 link through to FEC
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