1.5.8
RMII/MII
Signalname
Nr.
RMII
180
SMI_MDC
181
SMI_MDIO
182
RES_PHY_N
183
TXD_P0(0)
184
TXD_P0(1)
185
RXD_P0(0)
186
RXD_P0(1)
187
TX_EN_P0
188
CRS_DV_P0
189
RX_ER_P0
190
TXD_P1(0)
191
TXD_P1(1)
192
RXD_P1(0)
193
RXD_P1(1)
194
TX_EN_P1
195
CRS_DV_P1
196
RX_ER_P1
197
-
198
-
199
TXD_P2(0)
200
TXD_P2(1)
201
RXD_P2(0)
202
RXD_P2(1)
203
TX_EN_P2
204
CRS_DV_P2
205
RX_ER_P2
Copyright © Siemens AG 2010. All rights reserved.
Änderungen vorbehalten
Signalname
IO
(5)
MII
(Reset)
PHY-Management
SMI_MDC
O/O (O)
SMI_MDIO
B/B (I)
RES_PHY_N
O/O (O)
RMII-0/MII-0
TXD_P0(0)
O/O (O)
TXD_P0(1)
O/O (O)
RXD_P0(0)
I/I (I)
RXD_P0(1)
I/I (I)
TX_EN_P0
O/O (O)
CRS_P0
I/I (I)
RX_ER_P0
I/I (I)
RMII-1/MII-0
TXD_P0(2)
O/O (O)
TXD_P0(3)
O/O (O)
RXD_P0(2)
I/I (I)
RXD_P0(3)
I/I (I)
TX_ERR_P0
O/O (O)
RX_DV_P0
I/I (I)
COL_P0
I/I (I)
RX_CLK_P0
I/I (I)
TX_CLK_P0
I/I (I)
RMII-2/MII-1
TXD_P1(0)
O/O (O)
TXD_P1(1)
O/O (O)
RXD_P1(0)
I/I (I)
RXD_P1(1)
I/I (I)
TX_EN_P1
O/O (O)
CRS_P1
I/I (I)
RX_ER_P1
I/I (I)
Pin-
Pull-
Nummer
M18
N18
R21
P22
N21
dn
N22
dn
M21
P21
dn
H19
dn
K18
L22
L21
dn
K21
dn
J21
M19
dn
G19
dn
M22
dn
K19
dn
K17
H21
G22
dn
F21
dn
E22
H22
dn
G18
dn
J18
Seite
18
Bemerkung
SMI - Clock
SMI - Input/Output
Reset PHY
RMII: Transmit Data Port0 Bit0
MII: Transmit Data Port0 Bit0
RMII: Transmit Data Port0 Bit1
MII: Transmit Data Port0 Bit1
RMII: Receive Data Port0 Bit0
MII: Receive Data Port0 Bit0
RMII: Receive Data Port0 Bit1
MII: Receive Data Port0 Bit1
RMII: Transmit Enable Port0
MII: Transmit Enable Port0
RMII: Carrier Sense/Data Valid
Port0
MII: Carrier Sense Port0
RMII: Receive Error Port0
MII: Receive Error Port0
RMII: Transmit Data Port1 Bit0
MII: Transmit Data Port0 Bit2
RMII: Transmit Data Port1 Bit1
MII: Transmit Data Port0 Bit3
RMII: Receive Data Port1 Bit0
MII: Receive Data Port0 Bit2
RMII: Receive Data Port1 Bit1
MII: Receive Data Port0 Bit3
RMII: Transmit Enable Port1
MII: Transmit Error Port0
RMII: Carrier Sense/Data Valid
Port1
MII: Receive Data Valid Port0
RMII: Receive Error Port1
MII: Collision Port0
MII: Reveive Clock Port0
MII: Transmit Clock Port0
RMII/MII: Transmit Data Port2
Bit0
MII: Transmit Data Port1 Bit0
RMII: Transmit Data Port2 Bit1
MII: Transmit Data Port1 Bit1
RMII: Receive Data Port2 Bit0
MII: Receive Data Port1 Bit0
RMII: Receive Data Port2 Bit1
MII: Receive Data Port1 Bit1
RMII: Transmit Enable Port2
MII: Transmit Enable Port1
RMII: Carrier Sense/Data Valid
Port2
MII: Carrier Sense Port1
RMII: Receive Error Port2
MII: Receive Error Port1
ERTEC 400 Handbuch
Version 1.2.2