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26-Bit + Repeat - TR-Electronic 582 Serie Benutzerhandbuch

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5.2.4.4 26-bit + repeat

With the programming "26-bit + repeat" with the second clock sequence clock
27 to clock 52 the stored position value is transferred again and serves for recognition
of transmission errors.
A further clock sequence of 26 clocks transfers a new updated data word. So a data
word is always repeated only once.
If the clock 27 follows after a time larger than the standard mono time of 20 µs, also a
new updated data word is sent.
The total number of the Number of data bits and SSI special bits must be
 26 bits.
A synchronous-serial data transmission with 26-bit + repeat is always 26 bits
long. The data transmission begins with the most significant bit (MSB) and contains
the position bits (P) and max. 8 freely programmable SSI special bits (S). The SSI
special bits are added after the LSB position bit. In the default setting the SSI special
bits are programmed to "Logical 0V" and produce, if they can be output, added
"zeros" up to the 26. clock.
Within the 26 clocks, the data can be shifted arbitrarily by the parameter Number of
data bits. The data can be transmitted right-justified or left-justified, with leading
"zeros" and without leading "zeros". Leading "zeros" are produced if the parameter
Number of data bits is programmed larger, as it would be necessary from the
total measuring length.
The parameter Number of data bits under the section SSI represents the
number of output position bits without the SSI special bits!
Example
Measuring system:
-
-
-
-
Output right-justified
Programmed Number of data bits = 24
MSB
1
2
0
0
 TR-Electronic GmbH 2018, All Rights Reserved
Page 56 of 64
1024 steps/revolution (10 bits)
4096 revolutions (12 bits)
--> Total number of steps = 22 bits
Code: Binary or Gray
3 – 24
21
0
– P 2
P 2
Data word 1
TR - ECE - BA - DGB - 0141 - 00
LSB MSB
25
26
1
2
S1 S2
0
0
3 – 24
25
21
0
– P 2
P 2
S1 S2
Data word 2
Printed in the Federal Republic of Germany
05/04/2018
LSB
26

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