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16
CONTROL SYSTEM
The control system consists of the following circuits,
- Program memory, ICf1
- NV RAM, ICf2
- Microcontroller, icf3
- AND gate, icf4
- Reset circuit, icf5 and
- Remote control and local control
Program memory, ICf1
Depending on the receiver version, the chassis may be
equipped with either 4 Mbit or 8 Mbit program memory.
Both are high speed Ultraviolet erasable and Electrically
Programmable Read Only Memories (UV EPROM). Later,
also an OTP (One Time Programmable) ROM or just a ROM
can be used.
The 4 Mbit (512 kbyte) memory is organized as 524 288
eight-bit words. The microcontroller addresses this
memory using the address lines A0...A18.
The 8 Mbit (1024 kbyte) memory is organized as 1 048 576
eight-bit words. This memory needs extra banking. This is
carried out by icf4, which divides the address space into
four separate blocks, data bank 0, 1, 2, and 3. The basic
software is programmed into data banks 0 and 1. Data
banks 2 and 3 are used for the Menu text and Electrical
User Manual (EUM) text.
The program memory communicates with the
microcontroller via the address and data bus.
NV RAM, ICf2
The NV RAM is a low power CMOS, 16 kbit Electrically Eras-
able and Programmable Read Only Memory (EEPROM). It
is organized as eight separate address blocks, each con-
sisting of 256 eight-bit words (8 x 256 x 8 = 16 384 bits).
Data is transferred via the IIC-bus.
Settings which can be stored in NV RAM include TV pro-
gram memory location information, IIC-bus controlled serv-
ice adjustments, normalization settings, user settings, op-
tion and configuration data, and teletext bank pages.
Microcontroller, icf3
The SDA30C264 is a low power CMOS circuit which in-
cludes an eight-bit CPU, a 2048 byte + 256 byte data
memory (RAM), an oscillator and clock circuits, two 16-bit
timers / counters and a watchdog timer. The microcontroller
is connected to the program memory via address and data
bus and to the other circuits via the IIC-bus.
Depending on the size of the program memory (4 Mbit or
8 Mbit) and the picture ratio (4:3 or 16:9), some compo-
nents (and gate icf4 and few jumpers) are either installed
or omitted. Consequently, some microcontroller pins have
different functions.
The pins marked by an asterisk (*) are explained in more
detail after the pin configuration table.
Pin configuration of the microcontroller SDA30C264
Pin
Description
1
Headphone switch input, Hp connected = high
2
AV-link data out to scart pin 10, high pulses
3 *
4Mb/4:3 : TA700 status in, plug connected = high
All 8Mb and all 16:9 : picture tilt output, 0...5 V
4
M3L-bus, enable for Megatext, enable = low
5
Hor shift adjustment in VGA sets
(PWM -> Xo3-1 = 0...5 V)
6 *
4Mb/4:3 : RGB status in, status on = high
All 8Mb and all16:9 : RGB status in = high / TA700
status in, plug connected = high
7
Hold from service connector, hold = low
8 *
Bank 1 / EPROM data bank selection control (8Mb)
9 *
Bank 0 / EPROM data bank selection control (8Mb)
10
Ground
11
Supply voltage, +5 Vstb
12...13 Crystal 12 MHz
14
Reset input, reset by low
15
Not connected
16...28 Address bus for program memory (EPROM)
29...36 Data bus for program memory (EPROM)
37...39 Address bus for program memory (EPROM)
40
Ground
41
Supply voltage, +5 Vstb
42
Address bus for program memory (EPROM)
43 *
EPROM data bank control (8Mb). Low = data
bank 0, high = data banks 1, 2 and 3
44
IIC-bus, serial clock
45
IIC-bus, serial data
46
Rec LED on by low / Local control read pulse out
(in to pins 61 or 62)
47 *
Multistandard IF = strobe pulse (low) for data latch
Non multistandard IF = APSi filter driver, APSi
by high
48 *
P_on, picture on voltages by low
49 *
R_on, recording voltages by low
50 *
Reset pulse (high) for MSP / Subwoofer
identification = low
51 *
Audio mute by high / Identification of 16:9 (lower
voltage), 4:3 (higher voltage)
52 *
Scart 3 identification / status in (off = 0 - 1.2V,
16:9 = 1.3 - 3.2V, 4:3 = 3.3 - 5V)
53...54 Scart 1, 2 status in (off = 0 - 1.2V, 16:9 = 1.3 - 3.2V,
4:3 = 3.3 - 5V)
55
Version identification of IF module. Reads the
resistor R556 (multi) / R526 (non multi)
56
GND
57
Address for program memory (EPROM)
58
Reference voltage of internal D/A-converters
59
M3L-bus, clock for Megatext
60
M3L-bus, data for Megatext
61
Local control 2 input
62
Local control 1 input
63
AV-link data in from scart pin 10, low pulses
64
Remote control input, high pulses
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