Fujitsu D2628 Technische Beschreibung Seite 21

Mainboard D2628
POST Code Error Beeps
24h
26h
28h 1-3-3-1
29h
2Ah
2Bh
2Ch 1-3-4-1
2Eh 1-3-4-3
2Fh
30h 1-4-1-1
32h
33h
36h
38h
3Ah
3Bh
3Ch
3Dh
41h
42h
45h
46h 2-1-2-3
48h
49h
4Ah
4Bh
4Ch
4Eh
4Fh
51h
52h
Fujitsu Technology Solutions
Description
Set segment register ES to 4GB access
Enable A20 line
Autosize DRAM
Initialize POST memory manager
Clear 512KB base RAM
Initialize CMOS emulation
RAM failure on address line xxxx
RAM failure on data bits xxxx of low byte of memory bus
Enable cache before system BIOS shadow
RAM failure on data bits xxxx of high byte of memory bus
Test CPU bus-clock frequency
Initialize Phoenix dispatch manager
Warm start shut down
Shadow system BIOS ROM
Autosize cache
Initialize debug services
Advanced configuration of chipset registers
Load alternate registers with CMOS values
Initialize RomPilot support
Initialize interrupt vectors
POST device initialization
Check ROM copyright notice
Check video configuration against CMOS
Initialize PCI bus and devices
Initialize all video adapters in the system
Start quiet boot
Shadow video BIOS ROM
Display BIOS copyright notice
Pre-Initialize boot sequence
Initialize EISA board
Test keyboard
English - 15
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