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AKG CM12/8 Bedienungsanleitung Seite 28

Matrix mixer
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Memory Commands
Output Complete Memory Setup
and output gains, either from the current setup or from memories 1-9. The 60 bytes of data are organized as
follows:
Host sends command - 7
Host sends data byte: Desired memory number, 0-9. 0 returns the current memory setup, while 1-9 return
the memory setups stored in EEPROM memories 1-9.
Host receives 60 data bytes: Complete matrix setup as defined below.
Each of the first 52 bytes represents the send levels from an input to two outputs. Each group of four bytes repre­
sents the input send level from one of the inputs to the eight outputs. The high nibble is the send level to odd
number outputs, and the low nibble is the send to even number outputs. Valid nibble values are:
The last eight bytes are the gain levels for the eight outputs. Valid values range from 0-127 with the following
meanings:
A typical memory setup is as follows:
Load New Matrix Setup from EEPROM
Upon receipt of the memory number, the MM8 will be set up with the values stored in EEPROM.
Host sends command - 8
Host sends data byte: New memory number, 1-9, to load as the current setup.
Load Current Matrix Setup from Host
current one in the MM8.
Host sends command - 9
Host sends 60 data bytes: New current memory setup, formatted as in Output Complete Memory Setup (7)
above.
- Outputs a complete memory data setup. This data consists of all input
0 / Off, 1 / -6dB, 2 / 0dB, 3 / +3dB
0-96
=
+10dB to -38dB in .5dB steps
97-126
=
-39dB to -68dB in 1dB steps
127
=
Mute
Byte 1
Out1|Out2
In 1
Snd1|Snd2
In 2
Snd1|Snd2
In 3
Snd1|Snd2
In 4
Snd1|Snd2
In 5
Snd1|Snd2
In 6
Snd1|Snd2
In 7
Snd1|Snd2
In 8
Snd1|Snd2
In 9
Snd1|Snd2
In 10
Snd1|Snd2
In 11
Snd1|Snd2
In 12
Snd1|Snd2
Noise
Snd1|Snd2
Output 1
Output 5
- Allows the host to trigger new memory setups from EEPROM memory.
- Allows the host to download an entire memory setup to replace the
28
Byte 2
Byte 3
Out3|Out4
Out5|Out6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Snd3|Snd4
Snd5|Snd6
Output 2
Output 3
Output 6
Output 7
CM12/8
Byte 4
Out7|Out8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Snd7|Snd8
Output 4
Output 8

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