06 Anhang
06.1 Anhang: Akronyme
Akronyme
BD
DDR
ETH
FPGA
FW
GigE
IP
MPSoC
NIC
PGC
QSFP+
SW
Tabelle 2: Akronyme
06.2 Anhang: Quellennachweise
Abbildungen
Module pad layout
Pad function definition
Tabelle 3: Quellennachweise
Ausgeschriebene Form
Buffer Descriptor
Double Data Rate
ETHernet
Field Programmable Gate Array
FirmWare
Gigabit Ethernet
Internet Protocol
Multi-Processor System on Chip
Network Interface Card
PLC2 Grabber Card
quad small form factor pluggable
Software
Quellen
QSFP+ 4X Hardware and Electrical Specification, Seite 14
https://www.snia.org/technology-communities/sff/specifications
(Stand 30.11.2022)
QSFP+ 4X Hardware and Electrical Specification, Seite 15
https://www.snia.org/technology-communities/sff/specifications
(Stand 30.11.2022)
F-00k-114-438.201
PGC-1000_User_Guide_DE_1.2.8
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