7
Cyclical transmission
RWr and RWw
RWrm0
RWrm1
RWrm2
RWrm3
RWrm4
to
RWrm(4+n0)
RWrm(o+1)
to
RWrm(o+1+n1)
RWrm(o+1)
to
RWrm(o+1+n2)
RWrm(o+1)
to
RWrm(o+1+n3)
RWrm(o+1)
to
RWrm(o+1+n4)
RWrm(o+1)
to
RWrm(o+1+n5)
RWrm(o+1)
to
RWrm(o+1+n6)
RWrm(o+1)
to
RWrm(o+1+n7)
m = Assigned module start address
nx = Size of Channel x where x0.....7
o = Last word of the previous channel
Details
Module area
RWrm0.b0
RWrm0.b1
RWrm0.b2
RWrm0.b3
RWrm0.b4
RWrm0.b5
RWrm0.b6
RWrm0.b7
RWrm0.b8
RWrm0.b9
RWrm0.bA
RWrm0.bB
RWrm0.bC
RWrm0.bD
RWrm0.bE
RWrm0.bF
www.balluff.com
Register
Slave
Module status area
Error code
Warning code
Usage prohibited
Input process data IO-
Link Channel 0
Input process data IO-
Link Channel 1
Input process data IO-
Link Channel 2
Input process data IO-
Link Channel 3
Input process data IO-
Link Channel 4
Input process data IO-
Link Channel 5
Input process data IO-
Link Channel 6
Input process data IO-
Link Channel 7
Register
Slave
Reserved
Initial processing
request
Operation condition
setting completion
Error status
Ready
Warning status
Reserved
Master
Register
RWwm0
RWwm1
RWwm2
RWwm3
RWwm4
to
RWwm(4+n0)
RWwm(o+1)
to
RWwm(o+1+n1)
RWwm(o+1)
to
RWwm(o+1+n2)
RWwm(o+1)
to
RWwm(o+1+n3)
RWwm(o+1)
to
RWwm(o+1+n4)
RWwm(o+1)
to
RWwm(o+1+n5)
RWwm(o+1)
to
RWwm(o+1+n6)
RWwm(o+1)
to
RWwm(o+1+n7)
Master
Register
RWwm0.b0
RWwm0.b1
RWwm0.b2
RWwm0.b3
RWwm0.b4
RWwm0.b5
RWwm0.b6
RWwm0.b7
RWwm0.b8
RWwm0.b9
RWwm0.bA
RWwm0.bB
RWwm0.bC
RWwm0.bD
RWwm0.bE
RWwm0.bF
Master
Slave
Module operation area
Usage prohibited
Usage prohibited
Usage prohibited
Output process data
IO-Link Channel 0
Output process data
IO-Link Channel 1
Output process data
IO-Link Channel 2
Output process data
IO-Link Channel 3
Output process data
IO-Link Channel 4
Output process data
IO-Link Channel 5
Output process data
IO-Link Channel 6
Output process data
IO-Link Channel 7
Master
Slave
Reserved
Initial processing
completion
Operation condition
setting request
Error clear request
Not used
Reserved
21