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Chassisplatte – Blockschaltplan / Chassis Board – Block Circuit Diagram
DVB T/C/T2*
V_SAW
IF
Tuner - ALPS
S_SAW
I2C address at C0
VCC3.3V
VCC1.2V_T2
VCC5V
DVB T/C/T2*
TS_OUT
I2CT
I2C address:D8 T/T2
I2C address:DC C
I2C
DVB S2
I2C address:D0h
Satellite
TS_OUT
TS_D0..7
tuner
DVB S2
I2C
I2C address:C0h
I2C_S
LNB supply
and control
I2C
I2C address:14h
PC-RGB & AUDIO
FULL SCART
YPrPb & Audio
USB
+5V2_ST
E2PROM1
VCC3.3V
32kbit
I2C address at A4
Panel data
VCC3.3V-ST
VCC1.8V
SPI Flash
DDR2
8Mbit
up to 64MX16bit
DDR2
I2C
VIF
SIF
DIF
RGB/CVBS
S3+
USB2.0
TS0_D0..7
TS1_D0..7
VCC3.3V-ST
RESET
HDMI1
HDMI
HDMI2
HDMI
I2S
HDMI3
HDMI
HDMI4
HDMI
HDMI
HDMI_DLNA
I2C-SCL
PS331
I2C-SDA
VCC3.3V-HDMI
S3+ System Block Diagram (DVB T/C/S2/T2)
VCC1.8V
+12V
DDR2
50/60Hz
CCFL / LED
up to 64MX16bit
DDR2
8/10bit LVDS/ 8bit TTL
I2C
UART
VCC3.3V
VCC2V5
VCC1.8V
+5V2_ST
VCC1.2V
VCC3.3V-ST
TS_IN
SPI Flash
TS_OUT
PCMCIA
8Mbit
Parallel Flash*
VCC3.3V
PCMCIA/CI
up to 1Gbit NAND
VCC3.3V
IR, LED & Keyboard
+24V
+12V
VCC3.3V
DSP Audio Amp.
Speaker
8 Ohm 10W
I2C address at 38
Headphone
Line Out
COAX
OPTIC
Power
POWER_SW
DC-DC
+12V
VCC1.2V
DC-DC
VCC3.3V-ST
+5V2_ST
LDO
VCC5V
+12V
DC-DC*
VCC1.2V_T2
100/120Hz
CCFL / LED
POWER_SW
LVDS / TTL
FRC/MEMC*
VCC3.3V
VCC1.8V
VCC1.2V
DDR2
up to 64MX16bit
+1.9MVDD
Not Scrambled
MODE
TS0_D0..7 TS1_D0..7
TS_D0..7
TS_D0..7
DVB T/C
-
-
Hi Z
DVB S2/T2
-
IN
OUT
VCC1.2V_T2
VCC3.3V
POK1
LDO
VCC2V5
POK
LDO
VCC1.8V
POWER_SW
LDO
+1.9MVDD
Scrambled
TS1_D0..7
TS_D0..7
IN
OUT
Hi Z
IN
Hi Z
OUT
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