Inhaltsverzeichnis
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Schaltpläne und Druckplattenabbildungen / Circuit Diagrams and Layout of PCBs
L78M05T
Output path
1
INTPUT
Over
current
protection
Refer-
Start
ence
circuit
voltage
Difference
amp
Current
limit
Heat protection
2
GND
TA8409F
V
CC
2
STANDBY
10
IN1
IN2
1
HEAT
PROTECTION
LC78622ED
9
6 4
3 5
7
21
2 59 64 11 32 33 62
SLICE
VCO CLOCK
DEFI
1
LEVEL
OSCILLATION
EFMIN
10
CONTROL
CLOCK CONTROL
SYNC
DETECTION
FSEQ
22
EFM
DEMODULATION
CLV+
12
C1C2 ERROR
CLV
CLV–
13
DETECTION
DIGITAL
V/P
14
CORRECTION
SERVO
FLAG
PROCESSING
PW
49
SUB CODE
SBCK
51
SEPARATION
SBSY
47
Q-CRC
SFSY
50
CS
63
WRQ
53
∝-COM
SQOUT
55
INTERFACE
CQCK
57
COIN
56
SERVO
STANDARD
COMMAND
RWC
54
PORTS
15
16
17
20
19
58
18
24
25
26
27
28
29
48
60
2 - 15
LA6393M
V OUT1
1
V IN1-
2
V IN1+
3
3
OUTPUT
OUTPUT
GND
4
V
S
7
VREF
9
V
REF
OUT1
8
M
3
OUT2
5
GND
23
8
ADDRESS
2kx8BIT
GENERATOR
RAM
30
C2F
MUTE
DIGITAL
DOUT
31
OUT
DIGITAL
ATTENUATOR
4 TIMES OVER SAMPLING
DIGITAL FILTER
34
NC
1bit DAC
XTAL
TIMING
L.P.F
GENERATOR
67
46
52
45
44
43
39
41
42
40
37
35
38
36
MCD 36 / MCD 40
Schaltpläne und Druckplattenabbildungen / Circuit Diagrams and Layout of PCBs
LC 78622 ED
PIN
PORT
I/O
8
VCC
NAME
Defect detect signal (DEF) input terminal.
1
DEFI
I
7
V OUT2
2
TAI
I
PLL
Input terminal for testing . Pulldown resistance is self-contained.
3
PDO
O
Phase comparison output terminal for outer VCO control.
4
VVSS
-
Power supply terminal for self-contained VCO. Normally 0V.
6
V IN2-
5
ISET
AI
Resistance connecting terminal for PDO output current adjustment.
6
VVDD
-
Earthing terminal for self-contained VCO. Normally 5V.
5
V IN2+
7
FR
AI
For VCO range frequency adjustment.
8
VSS
-
Earthing terminal for digital system. Normally 0V.
EFMO
O
For slice
EFM signal reverse output terminal.
9
10
EFMIN
I
level control
EFM signal input terminal.
11
TEST2
I
Input terminal for testing. Pulldown resistance is self-contained.
12
CLV+
O
Output terminal for spindle servo control. Accelerates when CLV+ is "H", slows down when CLV- "H".
13
CLV-
O
14
V/P
O
Output terminal for automatic switchover monitor by rough servo/phase control. "H" causes rough servo, "L" phases control mode.
15
HFL
I
Input terminal for track detecting signal. Schmidt input.
16
TES
I
Input terminal for tracking error signal. Schmidt input.
17
TOFF
O
Output terminal for tracking OFF.
18
TGL
O
Output terminal for tracking gain switchover, "L" raises gain.
19
JP+
O
Output terminal for track jump.When JP+ is "H", accelerates at the time of outer track direction jump, or slows down at the time
20
JP-
O
of inner track direction jump.
21
PCK
O
Clock monitoring terminal for EFM data playback. At the time of phase lock, 4.3218MHz.
22
FSEQ
O
Output terminal for synchronous signal detection. When synchronous signal detected from EFM signal and synchronous signal
occurring inside correspond "H".
23
VDD
-
Earthing terminal for digital system.
24
CONT1
I/O
25
CONT2
I/O
26
CONT3
I/O
Input / output terminal.
27
CONT4
I/O
28
CONT5
I/O
29
EMPH
O
Output terminal for deemphasis monitor. At the time of "H", deemphasis disc is in playback.
30
C2F
O
C2 Frag output.
31
DOUT
O
Digital Out output terminal.
Input terminal for testing. Pulldown resistance is self-contained.
32
TEST3
I
Input terminal for testing. Pulldown resistance is self-contained.
33
TEST4
I
34
NC
-
Not connected
35
MUTEL
O
For 1 bit DAC Mute output terminal.
LVDD
-
Power supply terminal for L channel.
36
37
LCHO
O
L channel output terminal.
38
LVSS
-
Earthing terminal for L channel. Normally 0V.
Earthing terminal for R channel. Normally 0V.
39
RVSS
-
40
RCHO
O
R channel output terminal.
41
RVDD
-
Earthing terminal for R channel. Normally 0V.
42
MUTER
O
Mute output terminal.
43
XVDD
-
Power supply terminal for crystal oscillation. Normally 5V.
44
XOUT
O
Connecting terminal for 16.9344MHz crystal oscillator.
45
XIN
I
46
XVSS
-
Earthing terminal for crystal oscillation. Normally 0V.
47
SBSY
O
Output terminal for synchronous signal of sub-code block.
48
EFLG
O
Terminal for monitoring C1,C2, single, double correction.
49
PW
O
Output terminal for sub-code P,Q,R,S,T,U,W.
Output terminal for synchronous signal of sub-code frame. When sub-code is in standby, "= L".
50
SFSY
O
51
SBCK
I
Input terminal for sub-code readout clock. Schmidt input.
52
FSX
O
Output terminal for 7.35kHz synchronous signal which is divided frequency from crystal oscillation.
53
WRQ
O
Output terminal for sub-code Q output standby.
54
RWC
I
Input terminal for read/write control.
55
SQOUT
O
Sub-code Q output terminal.
Input terminal for command from micro computer.
56
COIN
I
57
CQCK
I
Input terminal for command input intake clock,or sub-code offtake clock from SQOUT. Schmidt input.
58
RES
I
Chip reset input terminal. When power is supplied, changeover to "L" once.
59
TST11
O
Input terminal for testing. Open (Normally "L" output).
60
16M
O
16.9344MHz output terminal. But outputs 33.8688MHz, only in case of quadruple speed playback mode.
61
4.2M
O
4.2336MHz output terminal.
Input terminal for testing. Pulldown resistance is self-contained.
62
TEST5
I
63
CS
I
Chip select input terminal. Pulldown resistance is self-contained.
64
TEST1
I
Input terminal for testing. Pulldown resistance is self-contained.
GRUNDIG Service
2 - 16
DESCRIPTION
MCD 36 / MCD 40
GRUNDIG Service
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